In this paper, the architecture of a mixed-signal CNN visual processor with on board photodetecting sensor array analog RAM, and a switching matrix to process off chip sensor signals is proposed. In our design, the CMOS sensor array possesses high performance readout circuitry and embedded data storage capability. For further compactness, a new template memory structure is built that requires about quarter of silicon size compared to previous designs. The vision chip comprises most of the modules of a sensory system and keeps tight relationship between the sensors and the processor. © 2008 IEEE.